It is known in the prior art to realize a gray scale in a display device by providing a drive voltage signal having an amplitude that is proportional to brightness. Although this analog modulation scheme has been used successfully with other display devices, it is not practical for use with field emission display devices. Due to the device characteristics of the field emission array, the uniformity of the electron emission typically degrades at lower emission currents and, equivalently, at lower drive voltages.
To alleviate this uniformity problem, field emission displays are driven with drive voltages having values that are high enough to ameliorate the uniformity problem. The gray scale levels are then realized by modulating the pulse width of the constant voltage drive signal, so that the pulse width is proportional to the gray scale level, n. The constant of proportionality is equal to a gray scale pulse increment. The gray scale pulse increment is calculated by first determining a maximum pulse width, which is the pulse width that corresponds to the maximum brightness of the display. The gray scale pulse increment is calculated by dividing the maximum pulse width by the desired number of gray scale levels.
For a typical field emission display, the maximum pulse width is about 35 .mu.s. To achieve the 256 gray scale levels characteristic of a VGA display, the gray scale pulse increment is equal to 35 .mu.s divided by 256, or 0.14 .mu.s. This is a very short pulse. According to the above prior art scheme, the nth gray scale level is achieved by driving the display with a pulse having a pulse width equal to the gray scale pulse increment multiplied by n. For low n, the pulse width of the driving pulse can be within the pixel RC time constant of the display This causes the drive signal to be appreciably distorted when it reaches a pixel. Because of the significant signal distortions at low pulse widths, the brightness response with respect to the pulse width of the drive signal is non-linear at low pulse widths. This results in a brightness response that deviates appreciably from the brightness response of an ideal display that has a RC time constant equal to zero. The prior art has attempted to solve this problem by reducing the total number of gray scale levels. This compromises the quality of the display image.
Each electron emitter in a field emission display device can be modeled as a capacitor, and the interconnections, such as the ballast resistor, can be modeled as a resistance. Because these displays can be modeled as distributed resistive-capacitive networks, each addressed row and column has an intrinsic resistive-capacitive time constant. Driving one end of a row or column with a signal typically results in that signal becoming increasingly filtered as it travels across the display. The signal at a pixel along the given row or column will differ from the inputted drive signal. This detrimental effect is most pronounced at the lower end of the gray scale, wherein the drive pulses are shortest.
The RC time constant for a pixel of a field emission device can range from a few hundred nanoseconds to a few microseconds and is a function of device parameters, such as the resistance and capacitance per pixel. For example, for resistance per pixel and a capacitance per pixel of 1M .OMEGA. and 3 pF, respectively, the pixel RC time constant is 3 .mu.s. Given a gray scale pulse increment of 0.14 .mu.s, more: than 50% of the gray scale levels are affected by the resulting pulse distortion. While the pulse distortion car be improved by optimizing the display structure to lower the pixel RC time constant, even very low pixel RC time constants result in gray scale distortion at the first few levels.
Accordingly, there exists a need for an improved method for achieving a gray scale in a field emission display device, which provides a high number of gray scale levels.